The semiconductor integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of processing and manufacturing ICs.
For example, charged particle multi-beam (CPMB) lithography systems have great potential for scaling down the feature size in semiconductor manufacturing. In a CPMB lithography system, a single charged particle beam is generated by a charged particle source and then split into multiple beams (or beamlets). The individual beamlets pass through an electro-optical lens system and irradiate a target according to an IC design pattern, thereby transferring the IC design pattern to the target. One challenge in such a system is the low transmission efficiency of the charged particle beam.